The present invention relates to a control method for controlling both high frequency and low frequency transients of a controlled device, particularly in power generation systems.
Systems for use in controlling devices to operate according to predefined parameters are well known in many fields. The system in FIG. 1 represents a typical connection between a controller and a device being controlled. The output variable y is controlled by the controlling variable c*. This in turn is provided by a controller based upon a reference signal and a signal fed back from the controlled device. The reference signal is usually a DC or a low frequency signal. The purpose of the controller is to determine the required output c* based upon the difference between the reference signal yREF* and the feedback signal y. This type of controller is used in many applications, including power generation systems.
There are numerous applications which demand high power and high quality voltage generation, particularly three-phase voltage generation. More critical loads such as hospitals, banks, and communication centres have to use uninterruptible power supplies. Further, most of the electronic equipment in those systems is very sensitive not only to the changes in the voltage levels and frequency of the power supply system but also to harmonic distortion. Therefore, the use of diesel driven synchronous generators and similar power sources are limited for many applications because of the high harmonic content of the output voltage particularly when a non-linear load is applied.
One solution to these limitations is to use an inverter to generate high quality voltage within a system which controls the instantaneous voltage. There are many power sources that are naturally DC voltage sources but whose power has to be converted and exported via a three-phase voltage bus. However, inverters have a limited power capacity, and above a certain limit they suffer problems due to component availability, cost, physical limitations, heat dissipation and reliability. Thus, in order to expand the system total power capacity, a modular approach is used in which inverters are connected in parallel, sourcing the same load. The use of the modular approach increases system reliability and efficiency.
In use, there are various different types of load that may be applied to these systems. The most critical loads are unbalanced loads, rectifier loads and motor loads.
A small phase difference between parallel inverters may lead to circulating currents between modules, especially under fight load. This makes the synchronisation between the units an important part of the system development. Some of the methods use self-sychronisation, in other words they generate their reference phase using the three-phase voltage on the bus. An alternative is to use a separate communication link for this purpose.
Currently, there are two main control concepts for controlling a modular inverter system These are central mode control and master-slave control. A widely adopted approach to paralleling power modules is to use current mode control nested within a voltage control loop. The main control is based on the use of a single controller for the output voltage, which generates current references for all modules connected in parallel. This allows current sharing to be achieved.
The central mode control (CMC) method is derived from its DC-DC method equivalent central-limit control (CLC) and represents a variant of current-mode control. In this method, both the current and voltage controllers have an influence on the output current. All the inverter units operate as current sources, and there is a central control block, which controls the output voltage. The system for two power modules connected in parallel is represented in FIG. 2, where three functional parts can be recognised in each unit: a current controller Gc(s), a voltage source inverter (limiter), and an output filter HLC(s). This is a single-phase controller, and an equivalent model is used for the other phases.
There are two control loops in the system of FIG. 2: an overall voltage control loop and a local current control loop. The shared signals are the voltage error vE*, and the current reference is*. The voltage error vE* generated by the voltage controller Gv(s) based on the difference between the output voltage vo and the reference voltage vR*, and the output signal vC* from the current controller Gc(s) forms the inverter reference voltage vl*. The output of the inverter is applied to a filter HLC(s) and the output is the current is. The unit currents are summed at the point of common coupling, where the load current iL and the output voltage vo are sensed.
The current sharing controller Wc(s) is placed inside of the cent control block. Its main purpose is to maintain equivalent load share between the units. In a simple case it divides the output load current iL, by the number n of converters. It can also be used for additional filtering, before sharing. In that way, it can be said that all converters connected in parallel act as a single current source.
The open loop transfer function for n converters connected in parallel, including differences between units, is given in (1). The index k refers to a corresponding transfer function of one of the units. ZL indicates the impedance of the load.
                                          v            o                                              v              R              o                        -                          v              o                                      =                                                            nG                v                            ⁡                              (                s                )                                      ⁡                          [                                                                    ∑                    1                    n                                    ⁢                                                                          ⁢                                                                                    H                        LC                        k                                            ⁡                                              (                        s                        )                                                                                    1                      +                                                                                                    H                            LC                            k                                                    ⁡                                                      (                            s                            )                                                                          ⁢                                                                              G                            c                            k                                                    ⁡                                                      (                            s                            )                                                                                                                                                                1                                      1                    +                                                                                            H                          LC                          k                                                ⁡                                                  (                          s                          )                                                                    ⁢                                                                        G                          c                          k                                                ⁡                                                  (                          s                          )                                                                                                                                ]                                ⁢                      Z            L                                              (        1        )                                                                                                                                                                        H                        LC                        k                                            ⁡                                              (                        s                        )                                                              =                                                                  H                        LC                                            ⁡                                              (                        s                        )                                                                                                                                                                                                            G                        C                        k                                            ⁡                                              (                        s                        )                                                              =                                                                  G                        c                                            ⁡                                              (                        s                        )                                                                                                                  ⁢                                                  ⁢            k                    =          1                ,        2        ,        …        ⁢                                  ,        n                            (        2        )                                                      v            o                                              v              R              o                        -                          v              o                                      =                  n          ⁢                                          ⁢                                    G              v                        ⁡                          (              s              )                                ⁢                                    H              LC                        ⁡                          (              s              )                                ⁢                      Z            L                                              (        3        )            
The function of the current controller Gc(s) is to keep the difference between the reference current is* and the output current of the unit is small. The voltage controller Gv(s) in the central control block maintains the output voltage vo by generating the voltage error signal vs*. In the case of identical modules, when condition (2) is met, the transfer function (1) can be amplified to the expression shown in (3). It can be seen that the transfer function (3) does not depend on the current controller transfer function Gc(s). In other words, when the current sharing is ideal, the current controllers can be removed from FIG. 2 and the system can be represented as a parallel connected inverter system controlled from a single voltage controller Gv(s). However, in a real system, the current controllers help to equalise the output currents of the modules. With the CMC method, the current sharing is forced at all times, including during transients. During transients, the system will try to recover the output voltage using both voltage and current control loops: the voltage loop will try to recover the voltage by setting new current values, while the current loop will try to meet new current demands.
Both the vE* and is* are AC signals and have to be distributed to all of the converters using a high bandwidth link, which is the main disadvantage of this method. The control is performed in a stationary reference fine and the control variable is not a DC value, but an AC signal, at the fundamental frequency (50 or 60 Hz), which makes the control system sensitive to non-linear loads in terms of stability.
As for master-slave control methods (MSC), in the first configuration (MS1), one of the inverters operates in voltage control mode (the master) and all the others (the slaves) operate in current-mode control. The system represented in FIG. 3 consists of one master and one slave unit connected in parallel. This Figure represents a single phase of the system. The other phases can be controlled in the same way, since there are no interactions between the phase variables.
The output voltage vo of the system is controlled from the master unit, where the voltage controller Gv(s) is located. The shared signals are the voltage error vE* and the slave curt reference is* which is equivalent to the master unit current iM. The master inverter unit is directly fed by the voltage error vE* whereas in the slave inverter units voltages vl* are generated from the voltage error signal vE* and the output signals vc* from the current controllers Gc(s). The function of the current controller Gc(s) is to decrease the difference between the reference master current iM and the output current of the slave is. The output currents from the master and slave units, iM and is respectively, are obtained from the filter blocks HLC(s). The output currents are summed at the point of interconnection, where the output voltage vo is sensed.
The open loop transfer function for n converters connected in parallel using this method, including differences between the units, is given in (4). The index k refers to a corresponding transfer function of the slave unit, and the index M refers to the master unit.
                                          v            o                                              v              R              o                        -                          v              o                                      =                                                            G                v                            ⁡                              (                s                )                                      ⁡                          [                                                                    H                    LC                    M                                    ⁡                                      (                    s                    )                                                  +                                                      ∑                    2                    n                                    ⁢                                                                                                              H                          LC                          k                                                ⁡                                                  (                          s                          )                                                                    ⁢                                              (                                                  1                          +                                                                                                                    H                                LC                                M                                                            ⁡                                                              (                                s                                )                                                                                      ⁢                                                                                          G                                c                                k                                                            ⁡                                                              (                                s                                )                                                                                                                                    )                                                                                    1                      +                                                                                                    H                            LC                            k                                                    ⁡                                                      (                            s                            )                                                                          ⁢                                                                              G                            c                            k                                                    ⁡                                                      (                            s                            )                                                                                                                                                          ]                                ⁢                      Z            L                                              (        4        )                                                                                                                                                                        H                        LC                        k                                            ⁡                                              (                        s                        )                                                              =                                                                                            H                          LC                          M                                                ⁡                                                  (                          s                          )                                                                    =                                                                        H                          LC                                                ⁡                                                  (                          s                          )                                                                                                                                                                                                                                                              G                          c                          k                                                ⁡                                                  (                          s                          )                                                                    =                                                                        G                          c                                                ⁡                                                  (                          s                          )                                                                                      ⁢                                                                                                                                      ⁢                                                  ⁢            k                    =          2                ,        …        ⁢                                  ,        n                            (        5        )                                                      v            o                                              v              R              o                        -                          v              o                                      =                  n          ⁢                                          ⁢                                    G              v                        ⁡                          (              s              )                                ⁢                                    H              LC                        ⁡                          (              s              )                                ⁢                      Z            L                                              (        6        )            
In the case of identical inverters (5), the transfer function (4) can be simplified to expression (6) which is equivalent to the CMC method shown in (3). The transfer function does not depend on the current controller transfer function Gc(s) and the system can be represented as a parallel connected inverter system controlled from a single voltage controller Gv(s).
In this method the current sharing is forced in steady state but during transients there will be some differences between the master unit current and slave unit currents. The advantage of this control method is that the system will try to recover the output voltage during the transients by using both control loops, voltage and current. Non-identical modules can be connected to this system and the equivalent current distribution will be forced. However, an additional block will be necessary.
As in the CMC method, there is the disadvantage that signals error vE* and is* have to be distributed to all converters using a high bandwidth link. The control is performed in a stationary reference frame and again the control variable is an AC signal at the fundamental frequency (50 or 60 Hz). Although the current distribution is forced to be equal in steady state, the master unit takes most of the load current during transients.
In a second arrangement of the master-slave control method (MS2), similarly to the first arrangement, one of the inverters operates in the voltage control mode (the master) and all the others (the slaves) operate in current-mode control. A basic system structure representing one phase is shown in FIG. 4.
There is only one shared signal between the converters in this method, the slave reference current is*, which is supplied to each of the slave units. The current sharing weighting function WC(s) generates this signal from the measured load current iL by dividing it by the number of converters connected in the system. The output voltage vo of the system is controlled from the master unit, using voltage controller Gv(s), and the slave units provide the current demanded by the load. The role of the current controller GC(s) is to decrease the difference between the slave reference current is* and the output current of the slave is. The output currents iM and is are summed at the point of common coupling, where the output voltage vo is sensed by the master unit and the load current iL sensed by the central control block.
The open loop transfer function for n converters connected in parallel using this second arrangement, is given in (7).
                                          v            o                                              v              R              o                        -                          v              o                                      =                              (                          n              -              1                        )                    ⁢                                                    G                v                            ⁡                              (                s                )                                      ⁡                          [                                                                                                        ⁢                                                                                    H                        LC                        M                                            ⁡                                              (                        s                        )                                                                                    1                      +                                                                                                    H                            LC                            k                                                    ⁡                                                      (                            s                            )                                                                          ⁢                                                                              G                            c                            k                                                    ⁡                                                      (                            s                            )                                                                                                                                                                                    ∑                    2                    n                                    ⁢                                      n                                          1                      +                                                                                                    H                            LC                            k                                                    ⁡                                                      (                            s                            )                                                                          ⁢                                                                              G                            c                            k                                                    ⁡                                                      (                            s                            )                                                                                                                                                          ]                                ⁢                      Z            L                                              (        7        )                                                      v            o                                              v              R              o                        -                          v              o                                      =                                            G              v                        ⁡                          (              s              )                                ⁢                                                    H                LC                            ⁡                              (                s                )                                      ⁡                          [                                                                                                        ⁢                                      1                    +                                                                                            H                          LC                                                ⁡                                                  (                          s                          )                                                                    ⁢                                                                        G                          c                                                ⁡                                                  (                          s                          )                                                                                                                                      1                  +                                                                                                              H                          LC                                                ⁡                                                  (                          s                          )                                                                    ⁢                                                                        G                          c                                                ⁡                                                  (                          s                          )                                                                                      n                                                              ]                                ⁢                      Z            L                                              (        8        )            
In the case of identical modules the transfer function (7) can be derived to expression (8). The transfer function (8) is dependent on the current controller transfer function Gc(s), and is not linearly proportional to the number of converters n in the system.
In this arrangement of the control method the current sharing is forced by the current controllers at steady state, but during transients the master unit current and the slave unit currents will differ. The system will try to recover the output voltage during transients by the voltage control loop inside the master controller, which leads-to large changes of the master unit current. Non-identical modules and different power range modules can be connected to this system and the proportional current distribution can be achieved.
Only one signal is* has to be distributed to the slave converters which is an improvement over the CMC method and the first arrangement of the master slave method, but the requirement for the high bandwidth link still remains. The advantage is that no synchronisation link between the units is necessary, since they can be synchronised to the existing output voltage. The control is performed in the stationary reference frame and the control variable is an AC signal at the fundamental frequency, which makes the control system sensitive to some non-linear loads in terms of stability.
The limitation of the CMC, MS1 and MS2 methods is due to control in the (abc) stationary reference frame which makes the reference signals all AC, requiring a high bandwidth communication link.
The present invention provides an alternative way of controlling distributed resources while requiring low bandwidth communication links.